Exploring Machine Learning Inference on FPGAs for Real-Time Data Processing in High-Energy Physics

Abstract

The upcoming upgrades to CERN’s particle accelerator infrastructure, particularly the High-Luminosity Large Hadron Collider (HL-LHC), will lead to significantly higher data rates in experimental detectors. To manage this increase efficiently, it is essential to improve the ability to rapidly and accurately filter out irrelevant data while preserving as much valuable physics information as possible. Given the sheer volume and speed of data generated, low-latency, high-throughput processing becomes critical. Field-programmable gate arrays (FPGAs) are well-suited for this task due to their parallel processing capabilities, configurability, and low response times. While FPGAs have long been used in trigger systems at CERN, recent developments have sparked interest in leveraging Machine Learning (ML) techniques on these devices to enhance data selection capabilities. This project aims to explore the feasibility, benefits, and limitations of implementing ML models on FPGAs for real-time inference in high-energy physics experiments.

1 Introduction

CERN’s mission is to advance fundamental physics by operating a suite of particle accelerators and detectors.¹ At the heart of this mission are high-energy physics experiments, which rely on complex detectors to record collision events and extract meaningful insights from them. These detectors generate extremely large volumes of data. In current Large Hadron Collider (LHC) experiments, data rates can reach up to 40 Tbit/s.² With the upcoming High-Luminosity LHC (HL-LHC), expected to begin operations around 2030, data rates and complexity will increase substantially. To meet these demands, the trigger and data acquisition (TDAQ) systems will undergo a complete redesign. For example, the CMS Level-1 Trigger System at the HL-LHC will need to handle over 60 Tbit/s of detector data with a processing latency constraint of just 9.5 μs. This will be made possible by deploying approximately 200 AdvancedTCA (ATCA) boards equipped with Xilinx UltraScale+ FPGAs.³

2 Motivation

Increasing collision rates lead to higher data throughput. This requires faster and more efficient trigger systems. FPGAs offer low latency, power efficiency and parallelism. ML brings the advantage such that more complex patterns can be identified which can be beneficial for the selection of relevant data points. It might however come with the drawback of not being able to comprehend why the model made a certain decision.

3 Related Work

HLS4ML is a open source project for machine learning inference in FPGAs, which focuses on translating traditional ML packages into High-level synthesis (HLS).⁴ Other projects include Xilinx FINN⁵ and Xilinx Vitis-AI.⁶

4 Potential Goals

The project offers a range of possible directions, with the flexibility to emphasize either the machine learning or FPGA side, depending on interest and focus. Potential objectivs could include but are of course not limited to:

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1. CERN. What is CERN’s mission? https://home.cern/about/who-we-are/our-mission. Accessed: 2025-08-06. 2025. ↩︎

2. R. Aaij et al. “Allen: A high-level trigger on gpus for lhcb”. In: Computing and Software for Big Science 4.1 (Apr. 2020). DOI: 10.1007/s41781-020-00039-7. ↩︎

3. T. Williams and on behalf of the CMS collaboration. “System design and prototyping of the CMS Level-1 Trigger at the High-Luminosity LHC”. In: Journal of Instrumentation 19.03 (Mar. 2024), p. C03016. DOI: 10.1088/1748-0221/19/03/C03016. ↩︎

4. FastML Team. hls4ml. Version v1.1.0. Mar. 2025. DOI: 10.5281/zenodo.1201549. URL: https://github.com/fastmachinelearning/hls4ml. ↩︎

5. Xilinx. Xilinx FINN. URL: https://github.com/Xilinx/finn. ↩︎

6. Xilinx. Xilinx Vitis-AI. URL: https://github.com/Xilinx/Vitis-AI. ↩︎